The present invention relates to a video signal processing circuit for controlling power supply required for A/D conversion of an analog video signal as well as to a computer system with the video single processing circuit applied therein.
In recent years, a battery-driven system has generally been employed in a computer system such as a notebook personal computer. In this battery-driven system, a driving time is limited because of correlation between a battery life and a driving time. For this reason, in the case of the computer system, a technology of extending a continuous driving time for a system by reducing power consumption for the system as a whole has been demanded.
With the current state of the technology, however, as power is always supplied to a sampling circuit for an A/D converter, the circuit is driven, even when an irregular signal is received or a period with no signal received continues, for sampling to subject the signal to A/D conversion. For this reason, even when it is conceivable from the view point of an A/D converter and a video signal processing circuit as a
peripheral unit thereof or of the system as a whole that, even when the sampling driving is not needed, power is supplied to an A/D converter and the power is wastefully consumed, which makes an operating time of the whole system shorter.
There are some analogous technologies to solve the problem concerning the power consumption disclosed, for example, in Japanese Patent Laid-Open Publication No. HEI 5-176333 and Japanese Patent Laid-Open Publication No. HEI 6-292062. Disclosed in Japanese Patent Laid-Open Publication No. HEI 5-176333 is a technology that a video signal processing circuit detects a vertical blanking period from a received complex synchronizing signal and turns OFF an A/D converter for the period of time. Also disclosed in Japanese Patent Laid-Open Publication No. HEI 6-292062 is a technology as a method of saving power for a video camera that power to a camera block including an A/D converter is cut off during a standby state for recording.
In the conventional type of computer system like those in Japanese Patent Laid-Open Publication No. HEI 5-176333 and Japanese Patent Laid-Open Publication No. HEI 6-292062, only a prespecified period of time required for video signal processing like the vertical blanking period is devoted to reduction of power consumption, or reduction of power consumption is effected by certain operational situations in the system like the standby state for recording.
However, an approach of controlling power consumption by directly determining a received video signal itself is required for actually dealing with video signal processing in real time.
It is a first object of the present invention, putting attention to a received video signal itself, to provide a video signal processing circuit which can prevent wasteful power consumption in the circuit as a whole by eliminating unnecessary A/D conversion according to a video signal.
It is a second object of the present invention to provide a computer system which can prevent wasteful power consumption in the system as a whole by applying therein the video signal processing circuit which achieves the first object.
With the present invention, power supply for A/D conversion is controlled according to a synchronizing signal to an input analog video signal, so that unnecessary A/D conversion is eliminated according to a video signal, and with this feature, it is possible to prevent wasteful power consumption in a circuit as a whole.
With the present invention, power supply for A/D conversion is executed only when a synchronizing signal separated from an input analog video signal satisfies prespecified conditions, so that unnecessary A/D conversion for any video signal not satisfying the prespecified conditions is eliminated, and with this feature, it is possible to prevent wasteful power consumption in a circuit as a whole.
With the present invention, power supply for A/D conversion is executed only when a xe2x80x9cHxe2x80x9d (high) period of a horizontal synchronizing signal separated from an input analog video signal continues for more than a prespecified period of time, so that unnecessary A/D conversion for any video signal in which the xe2x80x9cHxe2x80x9d (high) period of a horizontal synchronizing signal does not reach the prespecified period of time is eliminated, and with this feature, it is possible to prevent wasteful power consumption in a circuit as a whole.
With the present invention, power supply is stopped when disturbance is confirmed in a horizontal synchronizing signal separated from an input analog video signal, so that power supply can be controlled in real time according to change in a horizontal synchronizing signal after normal power supply is started, and with this feature, it is possible to realize reduction of power consumption in real time in a circuit as a whole.
With the present invention, in a video signal processing circuit, power supply from a power supply unit for A/D conversion is controlled according to a synchronizing signal to an input analog video signal, so that unnecessary A/D conversion is eliminated according to a video signal, and with this feature, it is possible to prevent wasteful power consumption in a system as a whole.
With the present invention, in a video signal processing circuit, power supply from a power supply unit for A/D conversion is executed only when a synchronizing signal separated from an input analog video signal satisfies prespecified conditions, so that unnecessary A/D conversion is eliminated to any video signal which does not satisfy the prespecified conditions, and with this feature, it is possible to prevent wasteful power consumption in a system as a whole.
With the present invention, in a video signal processing circuit, power supply from a power supply unit for A/D conversion is executed only when a xe2x80x9cHxe2x80x9d (high) period of a horizontal synchronizing signal separated from an input analog video signal continues for more than a prespecified period of time, so that unnecessary A/D conversion is eliminated to any video signal in which the xe2x80x9cHxe2x80x9d (high) period of a horizontal synchronizing signal does not reach the prespecified period of time, and with this feature, it is possible to prevent wasteful power consumption in a system as a whole.
With the present invention, in a video signal processing circuit, power supply is stopped when disturbance is confirmed in a horizontal synchronizing signal separated from an input analog video signal, so that power supply from a power supply unit can be controlled in real time according to change in a horizontal synchronizing signal after normal power supply is started, and with this feature, it is possible to realize reduction of power consumption in real time in a system as a whole.
Other objects and features of this invention will become understood from the following description with reference to the accompanying drawings.